Power Architect
About the Team
OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.
About the Role
We are seeking a highly skilled cross-stack power architect with deep expertise in making ML systems energy efficient. This hands-on individual contributor will sit within our silicon implementation team and work closely with architecture, kernels, chip design, silicon implementation, platform design, and the broader industry ecosystem to architect, implement, and deploy performance-per-watt optimized next-generation AI accelerator chips and systems.
In this role, you will:
Oversee power architecture, implementation, and execution in silicon from concept to high-volume deployment, and propose high-ROI features to maximize performance under power envelope
Build chip and system-level power models grounded in empirical data and experience to guide organization-wide energy efficiency strategy. This requires a detailed understanding of ML workloads, ML chip and system architecture, silicon design, implementation, and characterization
Collaborate with chip and platform architecture/design teams to explore and implement power management features, including the specification and implementation of digital/mixed-signal IP, sensing and telemetry, firmware/system software, and silicon characterization methodology (in partnership with engineering teams)
Partner with silicon design and implementation teams, to optimize performance under power envelope. This includes (but is not limited to) clocking and power domain architecture, voltage/frequency selection, microarchitecture and physical-design driven power reduction, post-silicon voltage margin optimization and workload-informed power optimization
Work with ecosystem partners (EDA, ASIC, IP, component vendors) to drive innovations that can improve energy efficiency
Qualifications:
Relevant degree and strong industry experience focused on the end-to-end energy-efficient ML silicon codesign
Hands-on experience with power architecture, power estimation, power management and power optimization is required.
Fundamental understanding of ML chip and platform architecture, performance modeling and workload power/performance characteristics is strongly preferred.
Hands-on experience with power bring-up and power validation is strongly preferred.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
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