Memory Design Lead

As a Memory Design Lead, you will lead the growth of a new team of design and layout engineers based in Vietnam expanding on Silvaco’s embedded memory development capability. This role combines team development, leadership, coordination and organizational responsibilities with direct technical oversight, ensuring efficient processes and high-quality embedded memory
development for SRAM, DPRAM, ROM and Register Files.

Technical Leadership & Innovation
● Lead the design, simulation, and verification of embedded memory architectures,
focusing on performance, power, area, and reliability.
● Develop and implement automation flows and scripts to accelerate design cycles and improve quality.
● Conduct technical reviews and troubleshooting, driving root-cause analysis and
solutions for design challenges.
● Mentor engineers in advanced design methodologies and best practices.
● Collaborate with architecture, layout, and CAD teams to resolve technical issues and optimize designs.

Team Supervision & Collaboration
● Supervise and guide a team of memory layout and design engineers, fostering
incredible quality, technical growth and innovation.
● Lead technical discussions with global teams, aligning architecture, design reviews
and design decisions.
● Present technical findings, risks, and solutions to internal and external stakeholders.
● Drive performance modeling and benchmarking, identifying bottlenecks and proposing
optimizations.

Qualifications

● 7-12+ years of technical experience in memory system architecture, preferably in
memory technology companies or embedded memory for CPU/GPU/Edge or
Datacenter AI.
● 5+ years of team supervision or leadership experience.
● Hands-on experience with PPA models and high-speed memory pathfinding.
● Experience with FinFET and advanced planar technologies ranges from 2nm to 0.6um.
● Proficient in schematic capture (Cadence Virtuoso or equivalent)
● Proficient with spice simulators (hspice, spectre)
● Proficient in memory block floorplanning for embedded memories desired
● Understanding of RTL modelling (Verilog, VHDL)
● B.S., M.S., or Ph.D. in Electrical Engineering or equivalent experience.

Additional Information

COMPANY INFORMATION 

All Mixel salary ranges are determined by role, level and geographic location. Within the range, individual pay is determined by work location, role-related knowledge and skills, depth of experience, relevant education or training and additional role-related considerations. 

Depending on the position offered, equity, bonuses, commission or other forms of compensation may also be provided as part of total compensation package, in addition to full range of medical, financial and other benefits.

WE ARE AN EQUAL OPPORTUNITY EMPLOYER 

At Mixel, we do not discriminate based upon race, religion, color, national origin, gender (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics.