DDR Memory Controller Verification

Rivos is on a mission to build the best enterprise SOCs in the world with class leading performance, power, security and RAS features. We are seeking Memory Controller design verification engineers to join our team in building the best high performance memory interface in the world.

As a memory subsystem design verification engineer, you'll be responsible for all aspects of digital verification such as functional, performance, DFD and DFT features around DDR and HBM memory subsystem designs.