Head of SoC Architecture
About Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are hiring a Head of SoC Architecture to lead our architecture team driving Etched’s next-generation AI inference systems. This is not an incremental optimization role. You will own the end-to-end architectural direction for transformer-specific silicon, from high-level workload modeling and dataflow strategy to subsystem definition and SoC integration tradeoffs. You will set the standard for architectural rigor, performance modeling, and long-term technical differentiation.
You will partner closely with ASIC, software, and system leadership to ensure our chips and full systems deliver step-function improvements in performance. This is a foundational role shaping Etched’s long-term technical moat.
Key Responsibilities
Team Building and Technical Leadership
Build and lead a world-class architecture team
Establish architectural review processes and quality standards
Mentor senior architects and cultivate deep bench strength in modeling and innovation
Architectural Vision and Strategy
Define the multi-generation SoC architecture roadmap aligned to transformer evolution and emerging inference workloads
Drive macro-architectural tradeoffs across compute, memory hierarchy, interconnect, I/O, and system topology
Establish clear performance, power, and area targets grounded in workload-level modeling
Transformer-Optimized Compute Architecture
Lead dataflow, scheduling, and memory architecture decisions for large-scale transformer inference
Translate model characteristics into hardware primitives that maximize throughput and minimize latency
Identify architectural innovations that unlock new classes of real-time and agentic workloads
Performance Modeling and Analysis
Oversee cycle-accurate simulation, analytical modeling, and workload characterization
Build frameworks that connect model-level metrics to silicon-level constraints
Ensure architectural decisions are quantitatively justified rather than intuition-driven
SoC Integration and Cross-Functional Leadership
Partner with RTL, verification, physical design, firmware, and system software teams to ensure architectural feasibility
Own architectural specifications, interface definitions, and subsystem boundaries
Resolve cross-functional tradeoffs across power delivery, floorplan constraints, packaging, and bring-up realities
You may be a good fit if you have
12+ years of experience in computer architecture and ASIC design, with demonstrated ownership of complex SoC architectures
Proven leadership defining high-performance compute or accelerator architectures
Deep understanding of memory hierarchies, interconnects, compute pipelines, and system bottlenecks
Experience driving architectural decisions through tapeout and silicon bring-up
Strong background in performance modeling and workload-driven design
Experience with AI/ML accelerator architectures or large-scale compute systems
Strong intuition for power, area, and frequency tradeoffs at advanced process nodes
Familiarity with cycle-accurate simulators and architectural modeling tools
Ability to translate high-level workload requirements into microarchitectural specifications
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.