Staff Digital Design Engineer
About Us:
Innatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. These microprocessors mimic the brain’s mechanisms for processing fast data streams from sensors, enabling complex turn-key sensor analytics functionalities, with 10,000x higher performance per watt than competing solutions. Innatera's technology serves as a critical enabler for next-generation use cases in the IoT, wearable, embedded, and automotive domains.
With over €37m in funding raised, we're scaling fast towards bringing our neuromorphic technology to billions of sensors by 2030.
Our mission? To make the world smarter, safer, and greener. We're not just about pushing boundaries, we're about making a difference.
At Innatera we are committed to driving innovation and delivering exceptional results while creating an environment where our teams can thrive. We are a group of passionate, creative thinkers who thrive in a fast-paced environment on challenges and are always ready to take on the next big thing.
As a valued member of our team focused on making a positive impact, your unique contributions play a significant role in creating meaningful change. Working alongside a talented group of colleagues, you will experience a supportive environment that recognizes and values your life beyond the confines of work.
We will trust you with:
Architecting, designing, and implementing digital IP blocks and subsystems for our neuromorphic SoCs.
Translating high-level product and algorithmic requirements into RTL-level specifications and microarchitectures.
Owning all front-end design activities, including RTL coding (SystemVerilog/Verilog), synthesis, STA, simulation, and design documentation.
Collaborating closely with verification and backend engineers to align functionality, constraints, and design intent.
Defining and optimising PPA (Power, Performance, Area) goals across IPs and subsystems.
Developing design flows and automation scripts (Python/shell scripting) to improve productivity and consistency.
Applying low-power design techniques and contributing to overall SoC-level integration.
Writing and maintaining documentation, including IP specifications, design intent, and integration guides.
Mentoring junior engineers, contributing to code reviews, and fostering a culture of technical excellence and collaboration.
What you'll need to succeed:
6+ years of hands-on ASIC digital design experience, owning complex IPs through the full lifecycle.
Strong expertise in front-end digital design, including Verilog/SystemVerilog RTL development and debugging.
Solid understanding of SoC architecture, bus interfaces, and IP integration flows.
Experience performing synthesis and static timing analysis (STA) and defining timing constraints.
Proven experience with Cadence tools and industry-standard EDA flows.
Strong understanding of low-power design techniques and PPA trade-offs.
Proficiency in Python and shell scripting for design flow development and automation.
Excellent documentation skills from drafting specifications to design intent and integration documentation.
Strong cross-functional collaboration mindset
Excellent problem-solving and debugging abilities, with an analytical approach to complex design challenges.
Nice-to-haves:
Experience with FPGA prototyping (Vivado or similar).
Familiarity with DFT, synthesis, and STA flows.
Knowledge of communication protocols such as SPI, I2C, or AMBA.
Exposure to C/C++ for test or integration code.
Experience contributing to design methodology or flow development.
Prior experience mentoring or coaching junior engineers.
Why join Innatera?
At Innatera, you’ll be part of a pioneering team building the next generation of brain-inspired processors for edge AI. Your work will help bring groundbreaking technology to life, powering intelligent devices with real-world impact, from healthcare to consumer electronics.
Competitive salary.
Pension plan.
A flexible working environment (work-from-home policy, flexible working hours, advantageous holidays scheme) Note: We work from the office 3 days per week or you can work remotely for this role.
A generous holiday scheme.
A collaborative, ambitious team with the freedom to innovate.
An inclusive culture that values openness, curiosity, and personal growth.
Office perks like fresh fruit, snacks, and an on-site gym.
Statutory commuting/home allowance.
From engineering and machine learning to sales and non-engineering teams - whatever your expertise, your contributions will shape our growth.
Whether you’re passionate about microarchitecture, excited by verification or physical design, driven by supporting operations, building strong teams, or mastering the details of accounting, we’d love to hear from you!
If you're ready to shape the future of technology with us, click Apply and share your story.
Innatera is proud to be an equal opportunity employer. We welcome applicants of all backgrounds and experiences and are committed to building a diverse, inclusive, and respectful workplace. All qualified applicants will receive consideration for employment without regard to race, ethnicity, religion, gender, gender identity or expression, sexual orientation, disability, age, or other protected characteristics. If you require accommodations during the recruitment process, please let us know – we’re happy to support you.